As the method of bonding a semiconductor chip to a substrate, a flip chip bonding method is known. In this bonding method, a semiconductor chip is arranged with the circuit surface thereof facing the substrate side. The electrical connection is made by bonding a projection electrode called a bump formed in the circuit surface of the semiconductor chip to a terminal formed in the substrate. The flip chip bonding method is advantageous in miniaturizing and thinning the structure of a surface-mounted component. Furthermore, the flip chip bonding method is perceived to be advantageous in achieving high speed because the bonding distance is short. In particular, in electronic apparatuses, such as a mobile phone or a Personal Digital Assistant, and a memory card, an IC card, and the like, the number of surface-mounted components manufactured using the flip chip bonding method has been increasing.
In the flip chip bonding method, depending on the types of bumps, how to make electrical connection differs and also the steps in packaging and the materials to be used differ. The types of bumps include a solder bump, a gold bump, a nickel bump, a conductive resin bump, and the like. Hereinafter, (1) a method of bonding via the solder bump and (2) a method of bonding via the bump, such as the gold bump, the nickel bump, or the conductive resin bump are described, respectively.
(1) Method of Bonding Via the Solder Bump
The method of bonding via the solder bump is called C4. C4 is applied in bonding a large-scale logic semiconductor chip having a large number of terminals. The solder bumps are arranged across the circuit surface of a semiconductor chip (area arrangement).
C4 is performed as follows. The oxide film of a solder formed on the surface of a terminal formed in the circuit surface of a semiconductor chip is removed. A flux material that improves the wettability between the solder and a metal constituting a terminal formed in a substrate is applied onto the substrate. The semiconductor chip is pressed against the substrate after aligning the semiconductor chip with the substrate. Due to the adhesion of the flux, the semiconductor chip is temporarily placed on the substrate. Then, the substrate is provided in a reflow furnace and heated up to or beyond a temperature at which the solder melts. The terminal formed in the substrate and the solder are bonded by melting the solder bump. Next, in order to reinforce the bonding between the terminal and the solder, a liquid sealing resin called the underfill material is filled in the gap between the semiconductor chip and the substrate utilizing capillarity. Thereafter, the liquid sealing resin is cured to reinforce the bonding between the terminal and the solder. A method of filling the liquid sealing resin by utilizing capillarity is called a capillary flow method.
In recent years, with an increase in the number of terminals of a semiconductor chip, the pitch between terminals is getting narrower. Hence, the diameter of the solder bump is getting smaller and the distance between the semiconductor chip and the substrate is also getting narrower. Moreover, for the purpose of achieving high reliability of surface-mounted components, the filler content in the underfill material and the viscosity of the underfill material tend to increase. It takes a long time not only to cope with the narrowing pitch and the narrowing gap but to fill the high viscous underfill material using the capillary flow method.
Furthermore, adoption of lead-free solders has increased the reflow temperature. For this reason, upon cooling after reflow, a stress during contraction due to a difference in the thermal expansion coefficients between the substrate and the semiconductor chip increases the risk that the solder breaks. Accordingly, there is a need for protection of the solder also upon cooling after reflow.
In order to solve the problems of the capillary flow method as described above, a method is under study, in which a resin to serve as the underfill material is applied to a substrate in advance before mounting a semiconductor chip on the substrate (a packaging method of preliminarily placing the underfill material on a substrate). This method is called a no-flow underfill method. Studies on resin compositions capable of exhibiting both the flux function and the underfill function by containing a flux component in a resin are under way (e.g., see non-Patent Document 1 and non-Patent Document 2).
(2) Method of Bonding Via the Bump, Such as the Gold Bump, the Nickel Bump, or the Conductive Resin Bump
In this case, the number of terminals for connecting between a semiconductor chip and a substrate is on the order of 100 to 500 pins. The bump is often arranged in the outer periphery of the semiconductor chip (peripheral arrangement).
The examples of this bonding method include (A) a method based on a soldered joint between a gold wire bump and a solder formed in a substrate, (B) a method (SBB method) of bonding via a conductive resin formed on the surface of a gold wire bump, called a stud bump bonding, (C) a direct bonding method of bonding by contact by directly pressing a gold wire bump against a substrate, (D) a method of bonding a stud bump that is leveled via conductive particles using an anisotropic conductive adhesive, a gold-plating bump, or a nickel-plating bump to a terminal formed in a substrate, and (E) an ultrasonic method of metallically bonding a bump to a terminal formed in a substrate by applying an ultrasonic wave.
Since a semiconductor chip is bonded to a substrate via an adhesive in the direct bonding method (C) or the method using an anisotropic conductive adhesive (D), the electrical connection and the underfill filling can be performed simultaneously.
On the other hand, as for the other method, the capillary flow method is adopted, in which a solder bonding, a connection by curing a conductive resin, and a solid-phase metal bonding by applying an ultrasonic wave are carried out, respectively and thereafter an underfill material is injected, filled, and cured. Also in the case where the bonding via the bump, such as the gold bump, the nickel bump, or the conductive resin bump is carried out, a packaging method of preliminarily placing an underfill material on a substrate has been studied for the purpose of coping with the narrowing pitch or narrowing gap and also for simplifying the packaging process, as with C4.
The packaging method of preliminarily placing an underfill material on a substrate requires a step of applying a liquid resin to the substrate in advance or a step of applying a film-like resin onto the substrate in advance.
Application of a liquid resin is usually performed using a dispenser. The application from the dispenser is most often controlled by pressure. However, since the discharge amount of the liquid resin will vary in accordance with the viscosity change of the liquid resin even under a constant pressure, it is difficult to keep the amount of application constant. Too small amount of application would cause a non-filled region in which the liquid resin is not filled. If the amount of application is too much, a protruding liquid resin might adhere to a member that crimps a semiconductor chip and a substrate, or might scatter to the adjacent spaces.
On the other hand, in applying a film-like resin to a substrate, since the resin amount can be adjusted by adjusting the thickness and area of the film-like resin, the variation in the resin amount that protrudes during packaging can be reduced.
However, since there is a limit to the accuracy of an apparatus that applies the film-like resin to the substrate, the film-like resin larger than the size of the semiconductor chip needs to be applied to the substrate. Moreover, in bonding wide variety of semiconductor chips having different sizes to the substrate, the film-like resin matching the size of the semiconductor chip needs to be prepared, respectively. Under such technology trends, in recent years, there is a need for a method of efficiently obtaining a singulated semiconductor chip, upon which an adhesive layer matching the size of the semiconductor chip is adhered, and an efficient manufacture method of semiconductor devices using the same.
Then, there are proposed methods capable of solving the complexity in the packaging method of preliminarily placing an underfill material on a substrate and also capable of coping with the narrowing pitch and narrowing gap (e.g., see non-Patent Document 3, Patent Document 1, and Patent Document 2). In these methods, an adhesive as the underfill material is applied to a semiconductor wafer for forming a semiconductor chip and thereafter the semiconductor wafer is singulated to obtain a semiconductor chip upon which the adhesive is adhered. Then, this semiconductor chip is applied to a substrate.
In the method described in non-Patent Document 3, a resin is applied to a semiconductor wafer in advance and thereafter the semiconductor wafer is singulated to obtain a semiconductor chip upon which an underfill material is adhered. In this method, the semiconductor chip in which solder bumps are formed is used. Some of the solder bumps are exposed from the underfill material. The self-alignment of the solder corrects the positional offset between the semiconductor chip and the substrate.
However, in a semiconductor chip in which a bump formed by plating gold, nickel, or the like, or a gold wire bump formed using a gold wire is formed, the bonding is performed by applying an energy, such as by heating or applying an ultrasonic wave, while pressing the semiconductor chip against the substrate using a pressurizing head. For this reason, the self-alignment cannot be used.
On the other hand, in the method described in Patent Document 1, after applying a film-like adhesive to a semiconductor wafer, the semiconductor wafer is singulated by cutting. As a result, a semiconductor chip upon which the film-like adhesive has adhered is obtained. In this method, first, a layered product of semiconductor wafer/film-like adhesive/separator is fabricated. After cutting the layered product, a semiconductor chip upon which the film-like adhesive has adhered is obtained by peeling off the separator.
Patent Document 2 discloses the method, in which with a tape bonded to the semiconductor wafer circuit surface, the rear surface of this semiconductor wafer circuit surface is ground and then this wafer is cut by dicing and is singulated, and then a chip upon which an adhesive layer has adhered is picked up.    Patent Document 1: Japanese Patent No. 2833111    Patent Document 2: Japanese Unexamined Patent Application Publication No. 2006-49482    Non-Patent Document 1: Yoshinobu Homma, “Underfill materials for flip chip”, Electronic Materials, Kogyo Chosakai Publishing Co., Ltd., Sep. 1, 2000, vol. 39, No. 9, pp. 36-40    Non-Patent Document 2: Katsuyuki Mizuike, Eiichi Nomura, “Underfill materials for flip chip”, Electronic Technology, Nikkan Kogyo Shimbun Ltd., September, 2001, extra edition, pp. 82-83    Non-Patent document 3: Kazutoshi Iida, “Development of materials for bare chip mounting”, Electronic Technology, Nikkan Kogyo Shimbun Ltd., September, 2001, extra edition, pp. 84-87